*All times are in Pacific Daylight Time (PDT)
Session Time | Title | Session Chairs/Authors |
10/31/2022 | ||
| 10:30 AM – 12:30 PM | 1A Special Session: The Role of Graph Neural Networks in Electronic Design Automation | Jeyavijayan Rajendran (Texas A&M) |
| Why Should You Use Graph Neural Network for VLSI Design Automation? | Haoxing Ren (NVIDIA Corporation) Sid Nath (NVIDIA Corporation) Yan Zhang (NVIDIA Corporation) Hao Chen (University of Texas at Austin) Mingjie Liu (University of Texas at Austin) | |
| On Advancing Physical Design using Graph Neural Networks | Yi-Chen Lu (Georgia Institute of Technology) Sung Kyu Lim (Georgia Institute of Technology) | |
| Applying GNNs to Timing Estimation at RTL | Daniela Sánchez Lopera (Infineon Technologies AG, Germany and Technical University of Munich, Germany) Wolfgang Ecker (Infineon Technologies AG, Germany and Technical University of Munich, Germany) | |
| Embracing Graph Neural Networks for Hardware Security | Lilas Alrahis (New York University Abu Dhabi) Satwik Patnaik (Texas A&M University) Muhammad Shafique (New York University Abu Dhabi) Ozgur Sinanoglu (New York University Abu Dhabi) | |
| Graph Neural Network Techniques for Digital and Analog Design Predictions | Jiang Hu (Texas A&M University) | |
| 10:30 AM – 12:30 PM | 1B Compiler and System-level Techniques for Efficient Machine Learning | Sri Parameswaran (UNSW), Martin Rapp (KIT) |
| Fine-Granular Computation and Data Layout Reorganization for Improving Locality | Mahmut Kandemir (PSU) Xulong Tang (University of Pittsburgh) Jagadish Kotra (AMD Research) Mustafa Karakoy (TUBITAK-BILGEM) | |
| An MLIR-based Compiler Flow for System-Level Design and Hardware Acceleration | Nicolas Bohm Agostini (Northeastern University) Serena Curzel (Politecnico di Milano) Vinay Amatya (Pacific Northwest National Laboratory) Cheng Tan (Microsoft) Marco Minutoli (Pacific Northwest National Laboratory) Vito Giovanni Castellana (Pacific Northwest National Laboratory) Joseph Manzano (Pacific Northwest National Laboratory) David Kaeli (Northeastern University) Antonino Tumeo (Pacific Northwest National Laboratory) | |
| Physics-aware Differentiable Discrete Codesign for Diffractive Optical Neural Networks | Yingjie Li (University of Utah) Ruiyang Chen (University of Utah) Weilu Gao (University of Utah) Cunxi Yu (University of Utah) | |
| Big-Little Chiplets for In-Memory Acceleration of DNNs: A Scalable Heterogeneous Architecture | Gokul Krishnan (Arizona State University) A. Alper Goksoy (University of Wisconsin – Madison) Sumit Mandal (University of Wisconsin-Madison) Zhenyu Wang (Arizona State University) Chaitali Chakrabarti (Arizona State University) Jae-sun Seo (Arizona State University) Umit Ogras (University of Wisconsin – Madison) Yu Cao (Arizona State University) | |
| 10:30 AM – 12:30 PM | 1C Special Session: Addressing Sensor Security through Hardware/Software Co-design | Marilyn Wolf (University of Nebraska) |
| Attacks on Image Sensors | Marilyn Wolf (University of Nebraska — Lincoln) Kruttidipta Samal (University of Nebraska — Lincoln) | |
| False Data Injection Attacks on Sensor Systems | Dimitrios Serpanos (Computer Technology Institute and University of Patras) | |
| Stochastic Mixed-Signal Circuit Design for In-sensor Privacy | Ningyuan Cao (University of Notre Dame) Jianbo Liu (University of Notre Dame) Boyang Cheng (University of Notre Dame) Muya Chang (University of Notre Dame) | |
| Sensor Security: Current Progress, Research Challenges, and Future Roadmap | Anomadarshi Barua (University of California, Irvine) Mohammad Abdullah Al Faruque (University of California, Irvine) | |
| 10:30 AM – 12:30 PM | 1D Advances in Partitioning and Physical Optimization | Markus Olbrich (Leibniz Universität Hannover, Germany) Yu-Guang Chen (National Central University, Taiwan) |
| SpecPart: A Supervised Spectral Framework for Hypergraph Partitioning Solution Improvement | Ismail Bustany (AMD) Andrew Kahng (UCSD) Ioannis Koutis (New Jersey Institute of Technology) Bodhisatta Pramanik (Iowa State University) Zhiang Wang (University of California San Diego) | |
| HyperEF: Spectral Hypergraph Coarsening by Effective-Resistance Clustering | Ali Aghdaei (Stevens Institute of Technology) Zhuo Feng (Stevens Institute of Technology) | |
| Design and Technology Co-optimization Utilizing Multi-bit Flip-flop Cells | Soomin Kim (Seoul National University) Taewhan Kim (Seoul National University) | |
| Transitive Closure Graph-Based Warpage-aware Floorplanning for Package Designs | Yang Hsu (National Taiwan University) Min-Hsuan Chung (National Taiwan University) Yao-Wen Chang (National Taiwan University) Ci-Hong Lin (CoreTech System Co., Ltd.) | |
| 1:45 PM – 3:45 PM | 2A Special Session: Democratizing Design Automation with Open-Source tools: perspectives, opportunities, and challenges | Antonino Tumeo (Pacific Northwest National Laboratory) |
| A Mixed Open-Source and Proprietary EDA Commons for Education and Prototyping | Andrew Kahng (UCSD) | |
| SODA Synthesizer: an Open-source, Multi-level, Modular, Extensible compiler from High-level Frameworks to Silicon | Nicolas Bohm Agostini (PNNL & Northeastern University) Ankur Limaye (Pacific Northwest National Laboratory) Serena Curzel (PNNL & Politecnico di Milano) Marco Minutoli (Pacific Northwest National Laboratory) Vito Giovanni Castellana (Pacific Northwest National Laboratory) Joseph Manzano (Pacific Northwest National Laboratory) Fabrizio Ferrandi (Politecnico di Milano) Antonino Tumeo (Pacific Northwest National Laboratory) | |
| OpenFPGA & LSOracle: Open-source FPGA Synthesis Guided by Machine Learning | Scott Temple (University of Utah) Ashton Snelgrove (University of Utah) Grant Brown (University of Utah) Pierre-Emmanuel Gaillardon (University of Utah) | |
| A Scalable Methodology for Agile Chip Development with Open-Source Hardware Components | Maico Cassel dos Santos (Columbia University) Tianyu Jia (Harvard University) Martin Cochet (IBM Research) Karthik Swaminathan (IBM Research) Joseph Zuckerman (Columbia University) Paolo Mantovani (Columbia University) Davide Giri (Columbia University) Jeff Jun Zhang (Harvard University) Erik Jens Loscalzo (Columbia University) Gabriele Tombesi (Columbia University) Kevin Tien (IBM Research) Nandhini Chandramoorthy (IBM Research) John-David Wellman (IBM Research) David Brooks (Harvard University) Gu-Yeon Wei (Harvard University) Kenneth Shepard (Columbia University) Luca P. Carloni (Columbia University) Pradip Bose (IBM Research) | |
| 1:45 PM – 3:45 PM | 2B Accelerators on A New Horizon | Vaibhav Verma (Qualcomm) Georgios Zervakis (KIT) |
| GraphRC: Accelerating Graph Processing on Dual-addressing Memory with Vertex Merging | Wei Cheng (National Cheng Kung University) Chun-Feng Wu (Harvard University) Yuan-Hao Chang (Academia Sinica) Ing-Chao Lin (National Cheng Kung University) | |
| Spatz: A Compact Vector Processing Unit for High-Performance and Energy-Efficient Shared-L1 Clusters | Matheus Cavalcante (ETH Zurich) Domenic Wuethrich (ETH Zürich) Matteo Perotti (ETH Zürich) Samuel Riedel (ETH Zurich) Luca Benini (Università di Bologna and ETH Zurich) | |
| Qilin: Enabling Performance Analysis and Optimization of Shared-Virtual Memory Systems with FPGA Accelerators | Edward Richter (University of Illinois at Urbana-Champaign) Deming Chen (UIUC) | |
| ReSiPI: A Reconfigurable Silicon-Photonic 2.5D Chiplet Network with PCMs for Energy-Efficient Interposer Communication | Ebadollah Taheri (Colorado State University) Sudeep Pasricha (Colorado State University) Mahdi Nikdast (Colorado State University) | |
| 1:45 PM – 3:45 PM | 2C Special Session: CAD for Confidentiality of Hardware IPS | Swarup Bhunia (University of Florida) |
| Hardware IP Protection against Confidentiality Attacks and Evolving Role of CAD Tool | Swarup Bhunia (University of Florida) Amitabh Das (AMD) Saverio Fazzari (Booz Allen Hamilton) Vivian Kammler (Sandia National Laboratories) David Kehlet (Intel) Jeyavijayan Rajendran (Texas A&M University) Ankur Srivastava (University of Maryland) | |
| 1:45 PM – 3:45 PM | 2D Analyzing Reliability, Defects and Patterning | Gaurav Rajavendra Reddy (Intel) Kostas Adam (Siemens EDA) |
| Pin Accessibility and Routing Congestion Aware DRC Hotspot Prediction using Graph Neural Network and U-Net | Kyeonghyeon Baek (Seoul National University) Hyunbum Park (Seoul National University) Suwan Kim (Seoul National University) Kyu-Myung Choi (Seoul National University) Taewhan Kim (Seoul National University) | |
| A Novel Semi-Analytical Approach for Fast Electromigration Stress Analysis in Multi-Segment Interconnects | Olympia Axelou (University of Thessaly) Nestor Evmorfopoulos (University of Thessaly) George Floros (University of Thessaly) Georgios Stamoulis (University of Thessaly) Sachin S. Sapatnekar (University of Minnesota) | |
| HierPINN-EM: Fast Learning-Based Electromigration Analysis for Multi-Segment Interconnects Using Hierarchical Physics-informed Neural Network | Wentian Jin (University of California, Riverside) Liang Chen (University of California, Riverside) Subed Lamichhane (University of California, Riverside) Mohammadamir Kavousi (University of California, Riverside) Sheldon Tan (University of California at Riverside) | |
| Sub-resolution Assist Feature Generation with Reinforcement Learning and Transfer Learning | Guan Ting Liu (National Taiwan University) Wei-Chen Tai (National Taiwan University) Yi-Ting Lin (National Taiwan University) Iris Hui-Ru Jiang (National Taiwan University) James Shiely (Synopsys) Pu-Jen Cheng (National Taiwan University) | |
| 4:15 PM – 5:45 PM | 3A New Frontier in Verification Technology | Jyotirmoy Vinay Deshmukh (University of South California) Zahra Ghodsi (University of California, San Diego) |
| Automatic Test Configuration and Pattern Generation (ATCPG) for Neuromorphic Chips | I-Wei Chiu (National Taiwan University) Xin-Ping Chen (National Taiwan University) Jennifer Hu (Department of Applied Statistics and Information Science, Ming Chuan University) James Chien-Mo Li (National Taiwan University) | |
| ScaleHD: Robust Brain-Inspired Hyperdimensional Computing via Adapative Scaling | Sizhe Zhang (Villanova University) Mohsen Imani (University of California Irvine) Xun Jiao (Villanova University) | |
| Quantitative Verification and Design Space Exploration Under Uncertainty with Parametric Stochastic Contracts | Chanwook Oh (University of Southern California) Michele Lora (University of Southern California) Pierluigi Nuzzo (University of Southern California) | |
| 4:15 PM – 5:45 PM | 3B Low Power Edge Inteligence | Sabya Das (Synopsys) Jiang Hu (TAMU) |
| Reliable Machine Learning for Wearable Activity Monitoring: Novel Algorithms and Theoretical Guarantees | Dina Hussein (Washington State University) Taha Belkhouja (Washington State University) Ganapati Bhat (Washington State University) Jana Doppa (Washington State University) | |
| Neurally-Inspired Hyperdimensional Classification for Efficient and Robust Biosignal Processing | Yang Ni (University of California, Irvine) Nicholas Lesica (University College London) Fan-Gang Zeng (University of California, Irvine) Mohsen Imani (University of California Irvine) | |
| EVE: Environmental Adaptive Neural Network Models for Low-power Energy Harvesting System | Sahidul Islam (The University of Texas at San Antonio) Shanglin Zhou (University of Connecticut) Ran Ran (Lehigh University) Yufang Jin (UTSA) Wujie Wen (Lehigh Unversity) Caiwen Ding (University of Connecticut) Mimi Xie (The University of Texas at San Antonio) | |
| 4:15 PM – 5:45 PM | 3C Crossbars, Analog Accelerators for Neural Networks, and Neuromorphic Computing based on Printed Electronics | Hussam Amrouch (University of Stuttgart) Sheldon Tan (UCI) |
| Designing Energy-Efficient Decision Tree Memristor Crossbar Circuits using Binary Classification Graphs | Pranav Sinha (Oakland University) Sunny Raj (Oakland University) | |
| Fuse and Mix: MACAM-Enabled Analog Activation for Energy-Efficient Neural Acceleration | Hanqing Zhu (University of Texas at Austin) Keren Zhu (University of Texas at Austin) Jiaqi Gu (The University of Texas at Austin) Harrison Jin (The University of Texas at Austin) Ray Chen (The University of Texas at Austin) Jean Anne Incorvia (The University of Texas at Austin) David Z. Pan (University of Texas at Austin) | |
| Aging-Aware Training for Printed Neuromorphic Circuits | Haibin Zhao (Karlsruhe Institute of Technology) Michael Hefenbrock (Karlsruhe Institute of Technology) Michael Beigl (Karlsruhe Institute of Technology) Mehdi Tahoori (Karlsruhe Institute of Technology) | |
| 4:15 PM – 5:45 PM | 3D Designing DNN Accelerators | Elliott Delaye (AMD) Yiyu Shi (U of Notre Dame) |
| Workload-Balanced Graph Attention Network Accelerator with Top-K Aggregation Candidates | Naebeom Park (Pohang University of Science and Technology) Daehyun Ahn (Pohang University of Science and Technology) Jae-Joon Kim (Seoul National University) | |
| Re2fresh: A Framework for Mitigating Read Disturbance in ReRAM-based DNN Accelerators | Hyein Shin (KAIST) Myeonggu Kang (Korea Advanced Institute of Science and Technology) Lee-Sup Kim (KAIST) | |
| FastStamp: Accelerating Neural Steganography and Digital Watermarking of Images on FPGAs | Shehzeen Hussain (UC San Diego) Nojan Sheybani (UC San Diego) Paarth Neekhara (UCSD) Xinqiao Zhang (University of California San Diego) Javier Duarte (UC San Diego) Farinaz Koushanfar (University of California San Diego) | |
11/1/2022 | ||
| 6:00 AM – 7:00 AM | 4A Novel Chiplet Approaches from Interconnect to System (Virtual) | Xinfei Guo (SJTU) |
| GIA: A Reusable General Interposer Architecture for Agile Chiplet Integration | Fuping Li (State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences, University of Chinese Academy of Sciences) Ying Wang (State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences) Yuanqing Cheng (Beihang University) Yujie Wang (Institute of Computing Technology, Chinese Academy of Sciences) yinhe han (Institute of Computing Technology,Chinese Academy of Sciences) Huawei Li (Institute of Computing Technology, Chinese Academy of Sciences) Xiaowei Li (ICT, Chinese Academy of Sciences) | |
| Accelerating Cache Coherence in Manycore Processor through Silicon Photonic Chiplet | Chengeng Li (The Hong Kong University of Science and Technology) Fan Jiang (The Hong Kong University of Science and Technology) Shixi Chen (The Hong Kong University of Science and Technology) Jiaxu Zhang (The Hong Kong University of Science and Technology) Yinyi LIU (Electronic and Computer Engineering Department, The Hong Kong University of Science and Technology) Yuxiang Fu (Electronic and Computer Engineering Department, AI Chip Center for Emerging Smart Systems, The Hong Kong University of Science and Technology) Jiang XU (The Hong Kong University of Science and Technology (Guangzhou)) | |
| Re-LSM: A ReRAM-based Processing-in-Memory Framework for LSM-based Key-Value Store | Qian Wei (Shandong University) Zhaoyan Shen (Shandong University) Yiheng Tong (Shandong University) Zhiping Jia (Shandong University) Lei Ju (School of Cyber Science and Technology, Shandong University) Jiezhi Chen (Shandong University) Bingzhe Li (Oklahoma State University) | |
| 6:00 AM – 7:00 AM | 4B Architecture for DNN Acceleration (Virtual) | Zhezhi He (SJTU) |
| Hidden-ROM: A Compute-in-ROM Architecture to Deploy Large-Scale Neural Networks on Chip with Flexible and Scalable Post-Fabrication Task Transfer Capability | Yiming Chen (Tsinghua University) Guodong Yin (Tsinghua University) Mingyen Lee (Tsinghua University) Wenjun Tang (Tsinghua Univertisy) Zekun Yang (Tsinghua University) Yongpan Liu (Tsinghua University) Huazhong Yang (Tsinghua University) Xueqing Li (Tsinghua University) | |
| DCIM-GCN: Digital Computing-in-Memory to Efficiently Accelerate Graph Convolutional Networks | Yikan Qiu (Peking University) Yufei Ma (Peking University) Wentao Zhao (Peking University) Meng Wu (Peking University) Le Ye (Peking University) Ru Huang (Peking University) | |
| Hardware Computation Graph for DNN Accelerator Design Automation without Inter-PU Templates | Jun Li (Nanjing University) Wei Wang (Nanjing University) Wu-Jun Li (Nanjing University) | |
| 6:00 AM – 7:00 AM | 4C Multi-purpose Fundamental Digital Design Improvements (Virtual) | Sabya Das (Synopsys) |
| Dynamic Frequency Boosting beyond Critical Path Delay | Nikolaos Zompakis (Trimsignal) Sotirios Xydis (Harokopio University of Athens) | |
| ASPPLN: Accelerated Symbolic Probability Propagation in Logic Network | Weihua Xiao (Shanghai Jiao Tong University) Weikang Qian (Shanghai Jiao Tong University) | |
| A High-precision Stochastic Solver for Steady-state Thermal Analysis with Fourier Heat Transfer Robin Boundary Conditions | Longlong Yang (Fudan University) Cuiyang Ding (Fudan University) Changhao Yan (Associate Prof. Fudan University) Dian Zhou (University of Texas at Dallas) Xuan Zeng (Fudan University) | |
| 6:00 AM – 7:00 AM | 4D GPU Acceleration for Routing Algorithms (Virtual) | Umamaheswara Rao Tida (North Dakota State University) |
| Superfast Full-Scale GPU-Accelerated Global Routing | Shiju Lin (The Chinese University of Hong Kong) Martin Wong (The Chinese University of Hong Kong) | |
| X-Check: GPU-Accelerated Design Rule Checking via Parallel Sweepline Algorithms | Zhuolun He (The Chinese University of Hong Kong) Yuzhe Ma (The Hong Kong University of Science and Technology (Guangzhou)) Bei Yu (The Chinese University of Hong Kong) | |
| GPU-Accelerated Rectilinear Steiner Tree Generation | Zizheng Guo (Peking University) Feng Gu (Peking University) Yibo Lin (Peking University) | |
| 7:10 AM – 8:30 AM | 5A Breakthroughs in Synthesis – Infrastructure and ML Assist I (Virtual) | Christian Pilato (Politecnico di Milano) Miroslav Velev (Aries Design Automation) |
| HECTOR: A Multi-level Intermediate Representation for Hardware Synthesis Methodologies | Ruifan Xu (Peking University) Youwei Xiao (Peking University) Jin Luo (Peking University) Yun (Eric) Liang (Peking University) | |
| QCIR: Pattern Matching Based Universal Quantum Circuit Optimization Framework | Mingyu Chen (University of Science and Technology of China) Yu Zhang (University of Science and Technology of China) YongShang Li (University of Science and Technology of China) Zhen Wang (University of Science and Technology of China) Jun Li (University of Science and Technology of China) Xiang-Yang Li (University of Science and Technology of China) | |
| Batch Sequential Black-box Optimization with Embedding Alignment Cells for Logic Synthesis | Chang Feng (Huawei Noah’s Ark Lab) Wenlong Lyu (Huawei Noah’s Ark Lab) Zhitang Chen (Huawei Noah’s Ark Lab) Junjie Ye (Huawei Noah’s Ark Lab) Mingxuan Yuan (Huawei Noah’s Ark Lab) Jianye Hao (Tianjin University) | |
| Heterogeneous Graph Neural Network-based Imitation Learning for Gate Sizing Acceleration | Xinyi Zhou (The Chinese University of Hong Kong) Junjie Ye (Huawei) Chak-Wa Pui (Huawei Inc) Kun Shao (Noah’s Ark Lab, Huawei Technologies) Guangliang Zhang (Huawei) Bin Wang (Huawei) Jianye Hao (Tianjin University) Guangyong Chen (Shenzhen Institute of Advanced Technology, Chinese Academy of Sciences) Pheng Ann Heng (The Chinese University of Hong Kong) | |
| 7:10 AM – 7:50 AM | 5B Smart Search (Virtual) | Jianlei Yang (Beihang) |
| NASA: Neural Architecture Search and Acceleration for Hardware Inspired Hybrid Networks | Huihong Shi (Georgia Tech) Haoran You (Georgia Tech) Yang Zhao (Georgia Tech) Yingyan Lin (Georgia Tech) Zhongfeng Wang (Georgia Tech) | |
| Personalized Heterogeneity-aware Federated Search Towards Better Accuracy and Energy Efficiency | Zhao Yang (Northwestern Polytechnical University) Qingshuang Sun (Northwestern Polytechnical University) | |
| 7:10 AM – 7:50 AM | 5C Reconfigurable Computing: Accelerators and Methodologies I (Virtual) | Cheng Tan (Microsoft) |
| Towards High Performance and Accurate BNN Inference on FPGA with Structured Fine-Grained Pruning | Keqi Fu (Southeast University) Zhi Qi (Southeast University) Jiaxuan Cai (Southeast University) Xulong Shi (Southeast University) | |
| Towards High-Quality CGRA Mapping with Graph Neural Networks and Reinforcement Learning | Yan Zhuang (Chongqing Univeristy) Zhihao Zhang (Chongqing University) Dajiang Liu (Chongqing University) | |
| 7:10 AM – 7:50 AM | 5D Hardware Security: Attacks and Countermeasures (Virtual) | Johann Knechtel (NYU) Lejla Batina (Radboud University) |
| Attack Directories on ARM big.LITTLE Processors | Zili KOU (Hong Kong University of Science and Technology) Sharad Sinha (Indian Institute of Technology Goa) Wenjian HE (Hong Kong University of Science and Technology) Wei ZHANG (Hong Kong University of Science and Technology) | |
| AntiSIFA-CAD: A Framework to Thwart SIFA at the Layout Level | Rajat Sadhukhan (Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur) Sayandeep Saha (School of Physical and Mathematical Sciences, NTU Singapore) Debdeep Mukhopadhyay (Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur) | |
| 9:00 AM – 10:30 AM | 6A Advanced VLSI Routing and Layout Learning | Wing-Kai Chow (Cadence Design Systems) David Chinnery (Siemens EDA) |
| A Stochastic Approach to Handle Non-Determinism in Deep Learning-Based Design Rule Violation Predictions | Rongjian Liang (NVIDIA) Hua Xiang (IBM Research) Jinwook Jung (IBM Research) Jiang Hu (Texas A&M University) Gi-Joon Nam (IBM Research) | |
| Obstacle-Avoiding Multiple Redistribution Layer Routing with Irregular Structures | Yen-Ting Chen (National Taiwan University) Yao-Wen Chang (National Taiwan University) | |
| TAG: Learning Circuit Spatial Embedding From Layouts | Keren Zhu (University of Texas at Austin) Hao Chen (University of Texas at Austin) Walker Turner (NVIDIA Corporation) George Kokai (NVIDIA Corporation) Po-Hsuan Wei (NVIDIA Corporation) David Z. Pan (University of Texas at Austin) Haoxing Ren (NVIDIA Corporation) | |
| 9:00 AM – 10:30 AM | 6B Physical Attacks and Countermeasures | Satwik Patnaik (TAMU) Gang Qu (UMD) |
| PowerTouch: A Security Objective-Guided Automation Framework for Generating Wired Ghost Touch Attack on Touchscreens | Huifeng Zhu (Washington University in St.Louis) Zhiyuan Yu (Washington University in St. Louis) Weidong Cao (Washington University in St.Louis) Ning Zhang (Washington University in St.Louis) Xuan Zhang (Washington University in St.Louis) | |
| A Combined Logical and Physical Attack on Logic Obfuscation | Michael Zuzak (University of Maryland, College Park) Yuntao Liu (University of Maryland, College Park) Isaac McDaniel (University of Maryland, College Park) Ankur Srivastava (University of Maryland, College Park) | |
| A Pragmatic Methodology for Blind Hardware Trojan Insertion in Finalized Layouts | Alexander Hepp (Technical University of Munich) Tiago Diadami Perez (Taltech) Samuel Pagliarini (Tallinn University of Technology (TalTech)) Georg Sigl (Technical University of Munich/Fraunhofer AISEC) | |
| 9:00 AM – 10:30 AM | 6C Tutorial: Polynomial Formal Verification: Ensuring Correctness under Resource Constraints | Rolf Drechsler (University of Bremen/DFKI, Bremen) |
| Polynomial Formal Verification: Ensuring Correctness under Resource Constraints | Rolf Drechsler (University of Bremen/DFKI) Alireza Mahzoon (University of Bremen) | |
| 9:00 AM – 10:30 AM | 6D Scalable Verification Technologies | Viraphol Chaiyakul (Belmont Computing) Alex Orailoglu (University of California, San Diego) |
| Arjun: An Efficient Independent Support Computation Technique and its Applications to Counting and Sampling | Mate Soos (National University of Singapore) Kuldeep S Meel (National University of Singapore) | |
| Compositional Verification Using a Formal Component and Interface Specification | Yue Xing (Princeton University) HUAIXI LU (Princeton University) Aarti Gupta (Princeton University) Sharad Malik (Princeton University) | |
| Usage-Based RTL Subsetting for Hardware Accelerators | Qinhan Tan (Princeton University) Aarti Gupta (Princeton University) Sharad Malik (Princeton University) | |
| 11:00 AM – 12:30 PM | 7A Optimizing Digital Design Aspects: From Gate Sizing to Multi-Bit Flip-Flops | Amit Gupta (AMD, Inc.) Dirk Stroobandt (UGent) |
| TransSizer: A Novel Transformer-Based Fast Gate Sizer | Siddhartha Nath (NVIDIA Corp) Geraldo Pradipta (NVIDIA Corp) Corey Hu (NVIDIA Corp) Tian Yang (NVIDIA Corp) Brucek Khailany (NVIDIA) Haoxing Ren (NVIDIA Corporation) | |
| Generation of Mixed-Driving Multi-Bit Flip-Flops for Power Optimization | Meng-Yun Liu (National Tsing Hua University) Yu-Cheng Lai (National Tsing Hua University) Wai-Kei Mak (National Tsing Hua University) Ting-Chi Wang (National Tsing Hua University) | |
| DEEP: Developing Extremely Efficient Runtime On-Chip Power Meters | Zhiyao Xie (Hong Kong University of Science and Technology) Shiyu Li (Duke University) Mingyuan Ma (Duke University) Chen-Chia Chang (Duke University) Jingyu Pan (Duke University) Yiran Chen (Duke University) Jiang Hu (Texas A&M University) | |
| 11:00 AM – 12:30 PM | 7B Energy Efficient Hardware Acceleration and Stochastic Computing | Sunil Khatri (TAMU) Anish Krishnakumar (U of Wisconsin) |
| ReD-LUT: Reconfigurable In-DRAM LUTs Enabling Massive Parallel Computation | Ranyang Zhou (1-2063049869) Arman Roohi (University of Nebraska – Lincoln) Durga Misra (New Jersey Institute of Technology) Shaahin Angizi (New Jersey Institute of Technology) | |
| Sparse-T: Hardware accelerator thread for unstructured sparse data processing | Pranathi Vasireddy (University of North Texas) Krishna Kavi (University of North Texas) Gayatri Mehta (University of North Texas) | |
| Sound Source Localization using Stochastic Computing | Peter Schober (TU Wien) Seyedeh Newsha Estiri (University of Louisiana at Lafayette) Sercan Aygun (University of Louisiana at Lafayette) Nima TaheriNejad (TU Wien) M. Hassan Najafi (University of Louisiana at Lafayette) | |
| 11:00 AM – 12:30 PM | 7C Special Session: Approximate Computing and the Efficient Machine Learning Expedition | Medhi Tahoori (KIT Karlsruhe) |
Approximate Computing and ML: A match made in heaven Efficient Processing-in-Memory Design for Transformer-based Models Extremely Resource Constrained ML Inference via Approximation and Codesign | Jörg Henkel (Karlsruhe Institute of Technology) Hai Li (Duke University) Anand Raghunathan (Purdue University) Mehdi Tahoori (Karlsruhe Institute of Technology) Swagath Venkataramani (IBM Research) Xiaoxuan Yang (Duke University) Georgios Zervakis (Karlsruhe Institute of Technology) | |
| 11:00 AM – 12:30 PM | 7D Co-search Methods and Tools | Cunxi Yu (University of Utah) Yingyan “Celine” Lin (Georgia Tech) |
| ObfuNAS: A Neural Architecture Search-based DNN Obfuscation Approach | Tong Zhou (Northeastern University) Shaolei Ren (UC Riverside) Xiaolin Xu (Northeastern University) | |
| Deep Learning Toolkit-Accelerated Analytical Co-optimization of CNN Hardware and Dataflow | Rongjian Liang (NVIDIA) Jianfeng Song (Texas A&M University) Bo Yuan (Rutgers University) Jiang Hu (Texas A&M University) | |
| HDTorch: Accelerating Hyperdimensional Computing with GP-GPUs for Design Space Exploration | William Simon (École Polytechnique Fédérale de Lausanne) Una Pale (Swiss Federal Institute of Technology, Lausanne) Tomas Teijeiro (University of the Basque Country UPV/EHU) David Atienza (École Polytechnique Fédérale de Lausanne (EPFL)) | |
| 2:00 PM – 3:00 PM | 8A Reconfigurable Computing: Accelerators and Methodologies II | Peipei Zhou (University of Pittsburgh) |
| DARL: Distributed Reconfigurable Accelerator for Hyperdimensional Reinforcement Learning | Hanning Chen (University of California, Irvine) Mariam Issa (University of California, Irvine) Yang Ni (University of California, Irvine) Mohsen Imani (University of California Irvine) | |
| Temporal Vectorization: A Compiler Approach to Automatic Multi-Pumping | Carl-Johannes Johnsen (University of Copenhagen) Tiziano De Matteis (ETH Zurich) Tal Ben-Nun (ETH Zurich) Johannes de Fine Licht (ETH Zurich) Torsten Hoefler (ETH Zurich) | |
| 2:00 PM – 3:00 PM | 8B Compute-in-Memory for Neural Networks | Bo Yuan (Rutgers University) |
| ISSA: Input-Skippable, Set-Associative Computing-in-Memory (SA-CIM) Architecture for Neural Network Accelerators | Yun-Chen Lo (National Tsing Hua University) Chih-Chen Yeh (EE, National Tsing Hua University) Jun-Shen Wu (National Tsing Hua University, Hsinchu, Taiwan) Chia-Chun Wang (EE, National Tsing Hua University) Yu-Chih Tsai (EE, National Tsing Hua University) Wen-Chien Ting (EE, National Tsing Hua University) Ren-Shuo Liu (EE, National Tsing Hua University) | |
| Computing-In-Memory Neural Network Accelerators for Safety-Critical Systems: Can Small Weight Variations Be Disastrous? | Zheyu Yan (University of Notre Dame) X. Sharon Hu (University of Notre Dame) Yiyu Shi (University of Notre dame) | |
| 2:00 PM – 3:00 PM | 8C Breakthroughs in Synthesis – Infrastructure and ML Assist II | Sunil Khatri (Texas A&M University) Cunxi Yu (The University of Utah) |
| Language Equation Solving via Boolean Automata Manipulation | Wan-Hsuan Lin (National Taiwan University) Chia-Hsuan Su (National Taiwan University) Jie-Hong Roland Jiang (National Taiwan University) | |
| How Good is Your Verilog RTL Code? A Quick Answer from Machine Learning | Prianka Sengupta (Texas A&M University) Aakash Tyagi (Texas A&M University) Yiran Chen (Duke University) Jiang Hu (Texas A&M University) | |
| 2:00 PM – 3:00 PM | 8D In-Memory Computing Revisited | Biresh Kumar Joardar (University of Houston) Ulf Schlichtmann (Technical University of Munich) |
| Logic Synthesis for Digital In-Memory Computing | Muhammad Rashedul Haq Rashed (University of Central Florida) Sumit Kumar Jha (University of Texas at San Antonio) Rickard Ewetz (University of Central Florida) | |
| Design Space and Memory Technology Co-exploration for In-Memory Computing Based Machine Learning Accelerators | Kang He (Purdue University) Indranil Chakraborty (Purdue University) Cheng Wang (Purdue University) Kaushik Roy (Purdue University) | |
| 3:30 PM – 5:30 PM | 9A Special Session: 2022 CAD contest at ICCAD | Yu-Guang Chen (National Central University, Taiwan) |
| Overview of 2022 CAD contest at ICCAD | Yu-Guang Chen (National Central University) Chun-Yao Wang (National Tsing Hua University) Tsung-Wei Huang (University of Utah) Takashi Sato (Kyoto University) | |
| 2022 ICCAD CAD Contest Problem A: Learning Arithmetic Operations from Gate-Level Circuit | Chung-Han Chou (Cadence Taiwan, Inc.) Chih-Jen (Jacky) Hsu (Cadence Taiwan, Inc.) Chi-An (Rocky) Wu (Cadence Taiwan, Inc.) Kuan-Hua Tu (Cadence Taiwan, Inc.) | |
| 2022 ICCAD CAD Contest Problem B: 3D Placement with D2D Vertical Connections | Kai-Shun Hu (Synopsys, Inc.) I-Jye Lin (Synopsys, Inc.) Yu-Hui Huang (Synopsys, Inc.) Hao-Yu Chi (Synopsys, Inc.) Yi-Hsuan Wu (Synopsys, Inc.) Chin-Fang Cindy Shen (Synopsys, Inc.) | |
| 2022 ICCAD CAD Contest Problem C: Microarchitecture Design Space Exploration | Sicheng Li (Alibaba Group) Chen Bai (Alibaba Group) Xuechao Wei (Alibaba Group) Bizhao Shi (Alibaba Group) Yen-Kuang Chen (Alibaba Group) Yuan Xie (Alibaba Group) | |
| IEEE CEDA DATC: Expanding Research Foundations for IC Physical Design and ML-Enabled EDA | Jinwook Jung (IBM Research) Andrew Kahng (University of California, San Diego) Ravi Varadarajan (University of California, San Diego) Zhiang Wang (University of California, San Diego) | |
| 3:30 PM – 5:30 PM | 9B Architectures and Methodologies for Advanced Hardware Security | Amin Rezaei (California State University Long Beach) Gang Qu (UMD) |
| Inhale: Enabling High-Performance and Energy-Efficient In-SRAM Cryptographic Hash for IoT | Jingyao Zhang (University of California, Riverside) Elaheh Sadredini (University of California, Riverside) | |
| Accelerating N-bit Operations over TFHE on Commodity CPU-FPGA | Kevin Nam (Seoul National University) Hyunyoung Oh (Gachon University) Hyungon Moon (UNIST) Yunheung Paek (Dept. of Electrical and Computer Engineering and Inter-University Semiconductor Research Center (ISRC), Seoul National University) | |
| Fast and Compact Interleaved Modular Multiplication based on Carry Save Addition | Oleg Mazonka (New York University Abu Dhabi) Eduardo Chielle (New York University Abu Dhabi) Deepraj Soni (New York University Tandon School of Engineering) Michail Maniatakos (New York University Abu Dhabi) | |
| Accelerating Fully Homomorphic Encryption by Bridging Modular and Bit-Level Arithmetic | Eduardo Chielle (New York University Abu Dhabi) Oleg Mazonka (New York University Abu Dhabi) Homer Gamil (NYUAD) Michail Maniatakos (New York University Abu Dhabi) | |
| 3:30 PM – 5:30 PM | 9C Special Session: The Dawn of Domain-specific Hardware Accelerators for Robotic Computing | Dr. Jiang Hu (Texas A&M University) |
| A Reconfigurable Hardware Library for Robot Scene Perception | Yanqi Liu (Brown University) Anthony Opipari (University of Michigan) Odest Chadwicke Jenkins (University of Michigan) R. Iris Bahar (Colorado School of Mines) | |
| Analyzing and Improving Resilience and Robustness of Autonomous Systems | Zishen Wan (Georgia Institute of Technology) Karthik Swaminathan (IBM T.J. Watson Research Center) Pin-Yu Chen (IBM T.J. Watson Research Center) Nandhini Chandramoorthy (IBM T.J. Watson Research Center) Arijit Raychowdhury (Georgia Institute of Technology) | |
| Factor Graph Accelerator for LiDAR-Inertial Odometry | Yuhui Hao (Tianjin University) Bo Yu (PerceptIn) Qiang Liu (Tianjin University) Shaoshan Liu (PerceptIn) Yuhao Zhu (University of Rochester) | |
| Hardware Architecture of Graph Neural Network-enabled Motion Planner | Lingyi Huang (Rutgers University) Xiao Zang (Rutgers University) Yu Gong (Rutgers University) Bo Yuan (Rutgers University) | |
| 3:30 PM – 5:30 PM | 9D From logical to physical qubits: new models and techniques for mapping | Weiwen Jiang (George Mason University) |
| A Robust Quantum Layout Synthesis Algorithm with a Qubit Mapping Checker | Tsou-An Wu (National Taiwan University of Science and Technology) Yun-Jhe Jiang (National Taiwan University of Science and Technology) Shao-Yun Fang (National Taiwan University of Science and Technology) | |
| Reinforcement Learning and DEAR Framework for Solving the Qubit Mapping Problem | Ching-Yao Huang (National Tsing Hua University) CHI HSIANG LIEN (National Tsing Hua University) Wai-Kei Mak (National Tsing Hua University) | |
| Qubit Mapping for Reconfigurable Atom Arrays | Bochen Tan (University of California, Los Angeles) Dolev Bluvstein (Department of Physics, Harvard University) Jason Cong (University of California, Los Angeles) Mikhail Lukin (Department of Physics, Harvard University) | |
| MCQA: Multi-Constraint Qubit Allocation for Near-FTQC Device | Sunghye Park (Pohang University of Science and Technology) Dohun Kim (Pohang University of Science and Technology) Jae-Yoon Sim (Pohang University of Science and Techology) Seokhyeong Kang (Pohang University of Science and Technology) | |
11/2/2022 | ||
| 6:00 AM – 7:00 AM | 10A Smart Embedded Systems (Virtual) | Leonidas Kosmidis (Barcelona Supercomputing Center) Pietro Mercati (Intel Labs) |
| Smart Scissor: Coupling Spatial Redundancy Reduction and CNN Compression for Embedded Hardware | Hao Kong (Nanyang Technological University) Di Liu (Nanyang Technological University) SHUO HUAI (Nanyang Technological University) Xiangzhong Luo (Nanyang Technological University) Weichen Liu (Nanyang Technological University) Ravi Subramaniam (HP Inc.) Christian Makaya (HP Inc.) Qian Lin (HP Inc.) | |
| SHAPE: Scheduling of Fixed-Priority Tasks on Heterogeneous Architectures with Multi CPUs and Many PEs | Yuankai Xu (Shanghai Jiao Tong University) Tiancheng He (SJTU) Ruiqi Sun (Shanghai Jiao Tong University) Yehan Ma (Shanghai Jiao Tong University) Yier Jin (University of Florida) An Zou (Shanghai Jiao Tong University) | |
| On Minimizing the Read Latency of Flash Memory to Preserve Inter-tree Locality in Random Forest | Yu-Cheng Lin (National Tsing Hua University) Yu-Pei Liang (Chung Cheng University) Tseng-Yi Chen (National Central University) Yuan-Hao Chang (Academia Sinica) Shuo-Han Chen (National Taipei University of Technology) Wei-Kuan Shih (National Tsing Hua University) | |
| 6:00 AM – 7:00 AM | 10B Analog/Mixed-Signal Simulation, Layout, and Packaging (Virtual) | Biying Xu (Cadence) Ilya Yusim (Cadence) |
| Numerically-Stable and Highly-Scalable Parallel LU Factorization for Circuit Simulation | Xiaoming Chen (Institute of Computing Technology, Chinese Academy of Sciences) | |
| EI-MOR: A Hybrid Exponential Integrator and Model Order Reduction Approach for Transient Power/Ground Network Analysis | Cong Wang (Southern University of Science and Technology) dongen yang (Southern University of Science and Technology) Quan Chen (The Southern University of Science and Technology) | |
| Multi-Package Co-Design for Chiplet Integration | Zhen Zhuang (The Chinese University of Hong Kong) Bei Yu (The Chinese University of Hong Kong) Kai-Yuan Chao (Hong Kong Research Center, Huawei Technology Investment Co. Ltd.) Tsung-Yi Ho (The Chinese University of Hong Kong) | |
| 6:00 AM – 7:00 AM | 10C Advanced PIM and Biochip Technology and Stochastic Computing (Virtual) | Grace Li Zhang (TUM) |
| Gzippo: Highly-compact Processing-In-Memory Graph Accelerator Alleviating Sparsity and Redundancy | Xing Li (Shanghai Jiao Tong University) Rachata Ausavarungnirun (King Mongkut’s University of Technology North Bangkok) Xiao Liu (Bytedance Inc) Xueyuan Liu (Shanghai Jiao Tong University) Xuan Zhang (Shanghai Jiao Tong University) Heng Lu (shanghai jiaotong university) Zhuoran Song (Shanghai Jiao Tong University) Naifeng Jing (Shanghai Jiao Tong University) Xiaoyao Liang (Shanghai Jiao Tong University) | |
| CoMUX: Combinatorial-Coding-Based High-Performance Microfluidic Control Multiplexer Design | Siyuan Liang (The Chinese University of Hong Kong (CUHK)) Mengchu Li (Technical University of Munich) Tsun-Ming Tseng (Technical University of Munich) Ulf Schlichtmann (Technical University of Munich) Tsung-Yi Ho (The Chinese University of Hong Kong) | |
| Exploiting Uniform Spatial Distribution to Design Efficient Random Number Source for Stochastic Computing | Kuncai Zhong (Shanghai Jiao Tong University) Zexi Li (Shanghai Jiao Tong University) Haoran Jin (Shanghai Jiao Tong University) Weikang Qian (Shanghai Jiao Tong University) | |
| 6:00 AM – 6:40 AM | 10D On Automating Heterogeneous Designs (Virtual) | Haocheng Li (Cadence) |
| A Novel Blockage-avoiding Macro Placement Approach for 3D ICs based on POCS | Jai-Ming Lin (Department of Electrical Engineering, National Cheng Kung University) Po-Chen Lu (Department of Electrical Engineering, National Cheng Kung University) Heng-Yu Lin (Department of Electrical Engineering, National Cheng Kung University) Jia-Ting Tsai (Department of Electrical Engineering, National Cheng Kung University) | |
| Routability-driven Analytical Placement with Precise Penalty Models for Large-Scale 3D ICs | Jai-Ming Lin (Department of Electrical Engineering, National Cheng Kung University) Hao-Yuan Hsieh (Department of Electrical Engineering, National Cheng Kung University) Hsuan Kung (Department of Electrical Engineering, National Cheng Kung University) Hao-Jia Lin (Department of Electrical Engineering, National Cheng Kung University) | |
| 7:10 AM – 8:30 AM | 11A Special Session: Quantum Computing to Solve Chemistry, Physics and Security Problems | Swaroop Ghosh (Penn St. University) |
| Developing Scalable Algorithms to Inform Co-Design | Anne Matsuura (Intel Corporation) | |
| Quantum Machine Learning Applications in High-Energy Physics | Andrea Delgado (Oak Ridge National Laboratory) Kathleen Hamilton (Oak Ridge National Laboratory) | |
| Quantum Machine Learning for Material Synthesis and Hardware Security | Collin Beaudoin (Pennsylvania State University) Satwik Kundu (Pennsylvania State University) Rasit Topaloglu (IBM) Swaroop Ghosh (Pennsylvania State University) | |
| 7:10 AM – 8:30 AM | 11B Making Patterning Work (Virtual) | Yuzhe Ma (Hong Kong University of Science and Technology (Guangzhou)) |
| DeePEB: A Neural Partial Differential Equation Solver for Post Exposure Baking Simulation in Lithography | Qipan Wang (Peking University) Xiaohan Gao (Peking University) Yibo Lin (Peking University) Runsheng Wang (Peking University) Ru Huang (Peking University) | |
| AdaOPC: A Self-Adaptive Mask Optimization Framework For Real Design Patterns | Wenqian Zhao (The Chinese University of Hong Kong) Xufeng Yao (Chinese University of HongKong) Ziyang Yu (The Chinese University of Hong Kong) Guojin Chen (The Chinese University of HongKong) Yuzhe Ma (The Hong Kong University of Science and Technology (Guangzhou)) Bei Yu (The Chinese University of Hong Kong) Martin Wong (The Chinese University of Hong Kong) | |
| LayouTransformer: Generating Layout Patterns with Transformer via Sequential Pattern Modeling | Liangjian Wen (Huawei Technologies) Yi Zhu (Huawei Technology) Lei YE (Huawei Technologies Co., Ltd.) Guojin Chen (The Chinese University of HongKong) Bei Yu (The Chinese University of Hong Kong) Jianzhuang Liu (Huawei Noah’s Ark Lab) Chunjing Xu (Huawei Technologies) | |
| WaferHSL: Wafer Failure Pattern Classification with Efficient Human-Like Staged Learning | Qijing Wang (The Chinese University of Hong Kong) Martin Wong (The Chinese University of Hong Kong) | |
| 7:10 AM – 7:50 AM | 11C Advanced Verification Technologies (Virtual) | Takahide Yoshikawa (Fujitsu) |
| Combining Bounded Model Checking and Complementary Approximate Reachability to Accelerate Bug-Finding | Xiaoyu Zhang (East China Normal University) Shengping Xiao (East China Normal University) Jianwen Li (East China Normal University) Geguang Pu (East China Normal University) Ofer Strichman (Israel Institute of Technology) | |
| Equivalence Checking of Dynamic Quantum Circuits | Xin Hong (University of Technology Sydney) Yuan Feng (University of Technology Sydney) Sanjiang Li (University of Technology Sydney) Mingsheng Ying (Institute of Software, Chinese Academy of Sciences) | |
| 7:10 AM – 7:50 AM | 11D Routing with Cell Movement (Virtual) | Guojie Luo |
| ATLAS: A Two-Level Layer-Aware Scheme for Routing with Cell Movement | Xinshi Zang (The Chinese University of Hong Kong) Fangzhou Wang (The Chinese University of Hong Kong) Jinwei Liu (The Chinese University of Hong Kong) Martin Wong (The Chinese University of Hong Kong) | |
| A Robust Global Routing Engine with High-accuracy Cell Movement under Advanced Constraints | Ziran Zhu (National ASIC System Engineering Center, Southeast University) Fuheng Shen (National ASIC System Engineering Center, Southeast University) Yangjie Mei (National ASIC System Engineering Center, Southeast University) Zhipeng Huang (Department of Mathematics and Theories, Peng Cheng Laboratory) Jianli Chen (State Key Lab of ASIC & System, Fudan University) Jun Yang (National ASIC System Engineering Center, Southeast University) | |
| 10:30 AM – 12:30 PM | 12A Special Session: Hardware Security Through Reconfigurability: Attacks, Defenses, and Challenges | Michael Raitza (TU Dresden) |
| Securing Hardware through Reconfigurable Nano-structures | Nima Kavand (TU Dresden) Armin Darjani (TU Dresden) Shubham Rai (TU Dresden) Akash Kumar (TU Dresden) | |
| Reconfigurable Logic for Hardware IP Protection: Opportunities and Challenges | Luca Collini (New York University) Benjamin Tan (University of Calgary) Christian Pilato (Politecnico di Milano) Ramesh Karri (New York University) | |
| Towards Security-Adaptive Hardware: A Hitchhiker’s Guide | Patrick Jauernig (TU Darmstadt), Emmanuel Stapf (TU Darmstadt), Ahmad-Reza Sadeghi (TU Darmstadt), and Jeyavijayan Rajendran (Texas A&M University) | |
| Enabling Systematic and Measurable Security Verification | Jason Oberg (Tortuga Logic), Andres Meza (UC San Diego), and Ryan Kastner (UC San Diego) | |
| 10:30 AM – 12:30 PM | 12B Performance, Power and Temperature Aspects in Deep Learning | Callie Hao (Georgia Tech), Jeff Zhang (ASU) |
| RT-NeRF: Real-Time On-Device Neural Radiance Fields Towards Immersive AR/VR Rendering | Chaojian Li (Georgia Tech) Sixu Li (Georgia Tech) Yang Zhao (Georgia Tech) Wenbo Zhu (Georgia Tech) Yingyan Lin (Georgia Tech) | |
| All-in-One: A Highly Representative DNN Pruning Framework for Edge Devices with Dynamic Power Management | Yifan Gong (Northeastern University) Zheng Zhan (Northeastern University) Pu Zhao (Northeastern.edu) Yushu Wu (Northeastern University) Chao Wu (Northeastern University) Caiwen Ding (University of Connecticut) Weiwen Jiang (George Mason University) Minghai Qin (Self-employed) Yanzhi Wang (Northeastern University) | |
| Robustify ML-based Lithography Hotspot Detectors | Jingyu Pan (Duke University) Chen-Chia Chang (Duke University) Zhiyao Xie (Hong Kong University of Science and Technology) Jiang Hu (Texas A&M University) Yiran Chen (Duke University) | |
| Associative Memory Based Experience Replay for Deep Reinforcement Learning | Mengyuan Li (University of Notre Dame) Arman Kazemi (University of Notre Dame) Ann Franchesca Laguna (University of Notre Dame) X. Sharon Hu (University of Notre Dame) | |
| 10:30 AM – 12:30 PM | 12C Tutorial: TorchQuantum Case Study for Robust Quantum Circuits | Hanrui Wang (MIT) |
| TorchQuantum Case Study for Robust Quantum Circuits | Hanrui Wang (Massachusetts Institute of Technology) Zhiding Liang (University of Notre Dame) Jiaqi Gu (The University of Texas at Austin) Zirui Li (SJTU) Yongshan Ding (Yale University) Weiwen Jiang (George Mason University) Yiyu Shi (University of Notre Dame) David Z. Pan (University of Texas at Austin) Frederic T. Chong (The University of Chicago) Song Han (Massachusetts Institute of Technology) | |
| 10:30 AM – 12:30 PM | 12D Emerging machine learning primitives: from technology to application | Dharanidhar Dang (UC San Diego) Yiran Chen (Duke University) |
| COSIME: FeFET based Associative Memory for In-Memory Cosine Similarity Search | Che-Kai Liu (Zhejiang University) Haobang Chen (Zhejiang University) Mohsen Imani (University of California Irvine) Kai Ni (RIT) Arman Kazemi (University of Notre Dame) Ann Franchesca Laguna (University of Notre Dame) Michael Niemier (University of Notre Dame) X. Sharon Hu (University of Notre Dame) Liang Zhao (Zhejiang University) Cheng Zhuo (Zhejiang University) Xunzhao Yin (Zhejiang University) | |
| DynaPAT: A Dynamic Pattern-Aware Encoding Technique for Robust MLC PCM-Based Deep Neural Networks | Thai Hoang Nguyen (Sungkyunkwan University) Muhammad Imran (National University of Sciences and Technology (NUST)) Joon-Sung Yang (Yonsei University) | |
| Graph Neural Networks for Idling Error Mitigation | Vedika Saravanan (City College of New York, City University of New York) Samah Saeed (City College of New York) | |
| Quantum Neural Network Compression | Zhirui Hu (George Mason University) Peiyan Dong (Northeastern University) Zhepeng Wang (George Mason University) Youzuo Lin (Los Alamos National Laboratory) Yanzhi Wang (Northeastern University) Weiwen Jiang (George Mason University) | |
| 1:45 PM – 3:15 PM | 13A Design for Low Energy, Low Resource, but High Quality | Ravikumar Chakaravarthy (Xilinx) Cong “Callie” Hao (Georgia Tech) |
| Squeezing Accumulators in Binary Neural Networks for Extremely Resource-Constrained Applications | Azat Azamat (Ulsan National Institute of Science and Technology (UNIST)) Jaewoo Park (Ulsan National Institute of Science and Technology) Jongeun Lee (Ulsan National Institute of Science and Technology (UNIST)) | |
| WSQ-AdderNet: Efficient Weight Standardization based Quantized AdderNet FPGA Accelerator Design with High-Density INT8 DSP-LUT Co-Packing Optimization | Yunxiang Zhang (Binghamton University) Biao Sun (Tianjin University) Weixiong Jiang (Shanghaitech University) Yajun Ha (Shanghaitech University) Miao Hu (TetraMem Inc.) Wenfeng Zhao (Binghamton University) | |
| Low-Cost 7T-SRAM Compute-In-Memory design based on Bit-Line Charge-Sharing based Analog-To-Digital Conversion | Kyeongho Lee (korea univ.) Joonhyung Kim (Korea University) Jongsun Park (Korea University) | |
| 1:45 PM – 3:15 PM | 13B Microarchitectural Attacks and Countermeasures | Rajesh JS (Intel) Amin Rezaei (California State University Long Beach) |
| Speculative Load Forwarding Attack on Modern Processors | Hasini Witharana (University of Florida) Prabhat Mishra (University of Florida) | |
| Fast, Robust and Accurate Detection of Cache-based Spectre Attack Phases | Arash Pashrashid (National University of Singapore) Ali Hajiabadi (National University of Singapore) Trevor E. Carlson (National University of Singapore) | |
| CASU: Compromise Avoidance via Secure Updates for Low-end Embedded Systems | Ivan De Oliveira Nunes (Rochester Institute of Technology) Sashidhar Jakkamsetti (UC Irvine) Youngil Kim (UC Irvine) Gene Tsudik (UCI) | |
| 1:45 PM – 3:15 PM | 13C Genetic Circuits meet Ising Machines | Marc Riedel (University of Minnesota) Lei Yang (George Mason University) |
| Technology Mapping of Genetic Circuits: From Optimal to Fast Solutions | Tobias Schwarz (TU Darmstadt) Christian Hochberger (TU Darmstadt) | |
| DaS: Implementing Dense Ising Machines Using Sparse Resistive Networks | Naomi Sagan (University of California, Berkeley) Jaijeet Roychowdhury (University of California at Berkeley) | |
| QuBRIM: A CMOS Compatible Resistively-coupled Ising Machine with Quantized Nodal Interactions | Yiqiao Zhang (University of Rochester) Uday Kumar Reddy Vengalam (University of Rochester) Anshujit Sharma (University of Rochester) Michael Huang (University of Rochester) Zeljko Ignjatovic (University of Rochester) | |
| 3:45 PM – 5:45 PM | 14A Energy Efficient Neural Networks Via Approximate Computations | M. Hasan Najafi (University of Louisiana at Lafayette) Vidya Chabria (University of Minnesota) |
| Combining Gradients and Probabilities for Heterogeneous Approximation of Neural Networks | Elias Trommer (Infineon Technologies) Bernd Waschneck (Infineon Technologies) Akash Kumar (Technische Universitaet Dresden) | |
| Tunable Precision Control for Approximate Image Filtering in an In-Memory Architecture with Embedded Neurons | Ayushi Dube (ASU) Ankit Wagle (Arizona State University) Gian Singh (ASU) Sarma Vrudhula (Arizona State University) | |
| AppGNN: Approximation-Aware Functional Reverse Engineering using Graph Neural Networks | Tim Bücher (University of Stuttgart) Lilas Alrahis (New York University Abu Dhabi) Guilherme Paim (INESC-ID) Sergio Bampi (UFRGS – Federal Univ. of Rio Grande do Sul) Ozgur Sinanoglu (New York University Abu Dhabi) Hussam Amrouch (University of Stuttgart) | |
| Seprox: Sequence-based Approximations for Compressing Ultra-Low Precision Deep Neural Networks | Aradhana Mohan parvathy (Purdue University) Sarada Krithivasan (Purdue University) Sanchari Sen (IBM T.J. Watson Research Center) Anand Raghunathan (Purdue University) | |
| 3:45 PM – 5:45 PM | 14B Algorithms and Tools for Security Analysis and Secure Hardware Design | Rosario Cammarota (Intel) Satwik Patnaik (TAMU) |
| Evaluating the Security of eFPGA-based Redaction Algorithms | Amin Rezaei (California State University, Long Beach) Raheel Afsharmazayejani (University of Calgary) Jordan Maynard (California State University, Long Beach) | |
| An Approach to Unlocking Cyclic Logic Locking – LOOPLock 2.0 | Pei-Pei Chen (National Tsing Hua University) Xiang-Min Yang (National Tsing-Hua University) Yi-Ting Li (National Tsing Hua University) Yung-Chih Chen (National Taiwan University of Science and Technology) Chun-Yao Wang (Dept. CS, National Tsing Hua University) | |
| Garbled EDA: Privacy Preserving Electronic Design Automation | Mohammad Hashemi (Worcester Polytechnic Institute) Steffi Roy (University of Florida) Fatemeh Ganji (Worcester Polytechnic Institute) Domenic Forte (University of Florida) | |
| Don’t CWEAT It: Toward (CWE) (A)nalysis (T)echniques in Early Stages of Hardware Design | Baleegh Ahmad (New York University) Wei-Kai Liu (Duke University) Luca Collini (NYU Tandon School of Engineering) Hammond Pearce (New York University) Jason Fung (Intel) Jonathan Valamehr (Intel) Mohammad Bidmeshki (Intel) Piotr Sapiecha (Intel) Steve Brown (Intel) Krishnendu Chakrabarty (Duke University) Ramesh Karri (NYU) Benjamin Tan (University of Calgary) | |
| 3:45 PM – 5:45 PM | 14C Special Session: Making ML reliable: From devices to systems to software | Krishnendu Chakrabarty (Duke University) Partha Pande (Washington State University) |
| Reliable Computing of ReRAM Based Compute-in-Memory Circuits for AI Edge Devices | Meng-Fan Chang (National Tsing Hua University) Je-Ming Hung (National Tsing Hua University) Ping-Cheng Chen (I-Shou University) Tai-Hao Wen (National Tsing Hua University) | |
| Fault-tolerant Deep Learning Using Regularization | Biresh Kumar Joardar (University of Houston) Aqeeb Iqbal Arka (Washington State University) Janardhan Rao Doppa (Washington State University) Partha Pratim Pande (Washington State University) | |
| Machine Learning for Testing Machine-Learning Hardware: A Virtuous Cycle | Arjun Chaudhuri (Duke University) Jonti Talukdar (Duke University) Krishnendu Chakrabarty (Duke University) | |
| Observation Point Insertion using Deep Learning | Bonita Bhaskaran (NVIDIA Corporation) Sanmitra Banerjee (NVIDIA Corporation) Kaushik Narayanun (NVIDIA Corporation) Shao-Chun Hung (Duke University) Seyed Nima Mozaffari Mojaveri (NVIDIA Corporation) Mengyun Liu (NVIDIA Corporation) Gang Chen (NVIDIA Corporation) Tung-Che Liang (NVIDIA Corporation) | |
| 3:45 PM – 5:45 PM | 14D Autonomous Systems and Machine Learning on Embedded Systems | Ibrahim (Abe) Elfadel (Khalifa University, Abu Dhabi), Mimi Xie (UTSA) |
| Romanus: Robust Task Offloading in Modular Multi-Sensor Autonomous Driving Systems | Luke Chen (University of California Irvine) Mohanad Odema (University of California Irvine) Mohammad Al Faruque (University of California Irvine) | |
| ModelMap: A Model-based Multi-domain Application Framework for Centralized Automotive Systems | Soham Sinha (Boston University) Anam Farrukh (Boston University) Richard West (Boston University) | |
| INDENT: Incremental Online Decision Tree Training for Domain-Specific Systems-on-Chip | Anish Krishnakumar (University of Wisconsin-Madison) Radu Marculescu (The University of Texas at Austin) Umit Ogras (University of Wisconsin – Madison) | |
| SGIRR: Sparse Graph Index Remapping for ReRAM Crossbar Operation Unit and Power Optimization | Cheng-Yuan Wang (National Taiwan University) Yao-Wen Chang (National Taiwan University) Yuan-Hao Chang (Academia Sinica) | |
